Device and method for capacitive sensing

ABSTRACT

A semiconductor device comprises driver circuitry, an analog-digital (AD) converter, and processing circuitry. The driver circuitry is configured to supply a drive signal to a sensor array in a sensing frame comprising 2N bursts, N being an integer of two or more. The mixer circuitry is configured to modulate a plurality of carrier waves with a plurality of sensing signals corresponding to capacitances of a plurality of sensing electrodes of the sensor array, respectively, to output a plurality of mixer outputs. A number of the plurality of sensing electrodes is 2N−1 or 2N. The AD converter is configured to perform AD conversion on a sum signal of the plurality of mixer outputs. The processing circuitry is configured to detect an object based on the output of the AD converter.

CROSS REFERENCE

This application is a continuation of U.S. patent application Ser. No.16/533,490 filed Aug. 6, 2019, which claims priority to Japanese PatentApplication No. 2018-150310, filed on Aug. 9, 2018, the disclosure ofwhich are incorporated herein by reference in their entirety.

BACKGROUND Field

The present disclosure relates to a device and method for capacitivesensing.

Description of the Related Art

Capacitive sensing is used for proximity sensing to detect an approachor contact of an object, e.g., a user's finger or a stylus, to an inputdevice, e.g., a touch panel. While performing capacitive sensing, motionartifacts may be detected. As the motion artifacts may generate errorswhile performing capacitive sensing, a capacitive sensing system may bedesigned to suppress detection of a motion artifact.

SUMMARY

In one or more embodiments, a semiconductor device comprises drivercircuitry, mixer circuitry, an analog-digital (AD) converter, and aprocessing circuitry. The driver circuitry is configured to supply adrive signal to a sensor array in a sensing frame comprising 2N bursts,N being an integer of two or more. The mixer circuitry is configured tomodulate a plurality of carrier waves with a plurality of sensingsignals corresponding to capacitances of a plurality of sensingelectrodes of the sensor array, respectively, to output a plurality ofmixer outputs. The number of the plurality of sensing electrodes being2N−1 or 2N. The AD converter is configured to perform AD conversion on asum signal of the plurality of mixer outputs. The processing circuitryis configured to perform proximity sensing of an object to the sensorarray with respect to the sensing frame based on the output of the ADconverter. A carrier wave modulated with one of the plurality of sensingsignals is selected from first and second carrier waves during aplurality of first bursts of the 2N bursts. The first carrier wave beingin phase with the drive signal, and the second carrier wave has a phaseshifted from that of the first carrier wave by π.

In one or more embodiments, a method comprises supplying a drive signalto a sensor array in a sensing frame comprising 2N bursts. N being aninteger of two or more. The method further comprises modulating aplurality of carrier waves with a plurality of sensing signalscorresponding to capacitances of a plurality of sensing electrodes ofthe sensor array, respectively, to output a plurality of mixer outputs.The number of the plurality of sensing electrodes being 2N−1 or 2N.Further, the method comprises performing AD conversion on a sum signalof the plurality of mixer outputs to generate a digital data stream.Additionally, the method comprises performing proximity sensing of anobject to the sensor array with respect to the sensing frame based onthe digital data stream. A carrier wave modulated with one of theplurality of sensing signals is selected from first and second carrierwaves during a plurality of first bursts of the 2N bursts. The firstcarrier wave being in phase with the drive signal, and the secondcarrier wave has a phase shifted from that of the first carrier wave byπ.

BRIEF DESCRIPTION OF THE DRAWINGS

So that the manner in which the above recited features of the presentdisclosure may be understood in detail, a more particular description ofthe disclosure, briefly summarized above, may be had by reference toembodiments, some of which are illustrated in the appended drawings. Itis to be noted, however, that the appended drawings illustrate only someembodiments of this disclosure and are therefore not to be consideredlimiting of its scope, for the disclosure may admit to other equallyeffective embodiments.

FIG. 1 is a block diagram illustrating an example configuration of acapacitive sensing system, according to one or more embodiments.

FIG. 2 is a circuit diagram illustrating an example configuration ofcapacitive sensing circuitry, according to one or more embodiments.

FIG. 3 illustrates an example operation of the capacitive sensingsystem, according to one or more embodiments.

FIG. 4 is a circuit diagram illustrating an example configuration ofcapacitive sensing circuitry, according to one or more embodiments.

FIGS. 5, 6, 7, and 8 are circuit diagrams illustrating an exampleoperation of the capacitive sensing circuitry, according to one or moreembodiments.

FIG. 9 is a block diagram illustrating a capacitive sensing system,according to one or more embodiments.

DETAILED DESCRIPTION

A description is given below of embodiments of this disclosure. In thefollowing, same or similar components may be denoted by same orcorresponding reference numerals. Suffixes may be attached to referencenumerals to distinguish same components from each other.

In one or more embodiments, as illustrated in FIG. 1, a capacitivesensing system 100 comprises a sensor array 1 and a semiconductor device2.

In one or more embodiments, the sensor array 1 comprises sensingelectrodes 3 arrayed in rows and columns. In one or more embodiments,the sensor array 1 may be integrated in a touch panel. In alternativeembodiments, the sensor array 1 may be integrated in a display panel,such as a liquid crystal display (LCD) panel and an organic lightemitting diode (OLED) display panel. When the sensor array 1 isintegrated in an LCD panel comprising a plurality of common electrodesarrayed in rows and column, the common electrodes may be used as thesensing electrodes 3, in one or more embodiments. In one or moreembodiments, the sensing electrodes 3 are connected to the semiconductordevice 2.

In one or more embodiments, the semiconductor device 2 comprisescapacitive sensing circuitry 4 and a processing unit 5. In one or moreembodiments, the capacitive sensing circuitry 4 is configured to obtainsensing signals having signal levels corresponding to capacitances ofthe sensing electrodes 3 and generate digital outputs based on thesensing signals. The processing unit 5 is configured to performarithmetic processing on the digital outputs received from thecapacitive sensing circuitry 4 to achieve proximity sensing of anobject, such as a user's finger and a stylus, to the sensor array 1. Inone or more embodiments, the arithmetic processing for the proximitysensing is performed in units of Q sensing electrodes arrayed in aspecific direction, for example, the vertical direction in FIG. 1, whereQ is an integer of three or more. When the sensor array 1 is integratedin a display panel, display driver circuitry configured to drive thedisplay panel may be integrated in the semiconductor device 2.

In one or more embodiments, as illustrated in FIG. 2, the capacitivesensing circuitry 4 comprises input terminals 11 ₁ to 11 _(Q) connectedto the sensing electrodes 3 ₁ to 3 _(Q), respectively, driver circuitry12, current conveyer circuitry 13, encoder circuitry 14, ananalog-digital (AD) converter 15, and decoder circuitry 16. Illustratedin FIG. 2 is the configuration of a part of the capacitive sensingcircuitry 4 related to the Q sensing electrodes 3 enclosed in the dottedbox 6 in FIG. 1. In one or more embodiments, the Q sensing electrodes 3illustrated in FIG. 2 are arrayed in the vertical direction in FIG. 1.In one or more embodiments, one AD converter 15 is prepared for Qsensing electrodes 3.

In one or more embodiments, the driver circuitry 12 comprises Q drivers21 ₁ to 21 _(Q) connected to the input terminals 11 ₁ to 11 _(Q),respectively. In one or more embodiments, the drivers 21 ₁ to 21 _(Q)are configured to supply drive signals to the sensing electrodes 3 ₁ to3 _(Q), respectively. In one or more embodiments, the drive signals areperiodic signals of a frequency of f_(REF). In one or more embodiments,the drivers 21 ₁ to 21 _(Q) are supplied with a reference clock signalCLK_(REF) of the frequency f_(REF), and configured to generate the drivesignals in synchronization with the reference clock signal CLK_(REF).Signals of various waveforms may be used as the drive signals. Forexample, signals of a sinusoidal, triangular, or rectangular waveformmay be used as the drive signals.

In one or more embodiments, the current conveyer circuitry 13 comprisescurrent conveyers 22 ₁ to 22 _(Q) connected to the input terminals 11 ₁to 11 _(Q), respectively. In one or more embodiments, the currentconveyers 22 ₁ to 22 _(Q) are configured to output sensing signals f₁ tof_(Q) having signal levels corresponding to current levels of chargingand discharging currents of the sensing electrodes 3 ₁ to 3 _(Q),respectively. In one or more embodiments, the charging and dischargingcurrents of the sensing electrodes 3 ₁ to 3 _(Q) depend on theself-capacitances of the sensing electrodes 3 ₁ to 3 _(Q) when the drivesignals are supplied to the sensing electrodes 3 ₁ to 3 _(Q), and thesensing signals f₁ to f_(Q) are obtained as signals generated bymodulating the periodic signals of the frequency f_(REF) withinformation of the self-capacitances of the sensing electrodes 3 ₁ to 3_(Q).

In one or more embodiments, the encoder circuitry 14 comprises a phaseshifter 23 and Q mixers 24 ₁ to 24 _(Q). In one or more embodiments, thephase shifter 23 is configured to supply carrier waves Mix1 to MixQ tothe mixers 24 ₁ to 24 _(Q), respectively, in synchronization with thereference clock signal CLK_(REF). In one or more embodiments, the mixers24 ₁ to 24 _(Q) are configured to generate mixer outputs g₁ to g_(Q) bymodulating the carrier waves Mix1 to MixQ with the sensing signals f₁ tof_(Q), respectively.

In one or more embodiments, the carrier waves Mix1 to MixQ are eachselected from signals ϕ_(−π/2), ϕ₀, ϕ_(π/2), and ϕ_(π). In one or moreembodiments, the signal ϕ₀ is a signal in phase with the drive signals.In one or more embodiments, the signal ϕ₀ is a periodic signal havingthe same phase as that of the current waveforms of the drive signals. Inone or more embodiments, the signal ϕ_(π) is a signal of the oppositephase to that of the drive signals. In one or more embodiments, thesignal ϕ_(π/2) is a periodic signal having a phase delayed from that ofthe signal ϕ₀ by π/2, and the signal ϕ_(−π/2) is a periodic signalhaving a phase advanced from that of the signal ϕ₀ by π/2, that is, aphase delayed from that of the signal ϕ₀ by 3π/2.

In one or more embodiments, a sum signal of the mixer outputs g₁ tog_(Q) outputted from the mixers 24 ₁ to 24 _(Q) is supplied to the ADconverter 15. In one or more embodiments, the mixer outputs g₁ to g_(Q)are current signals, and the outputs of the mixer 24 ₁ to 24 _(Q) arecommonly connected to the input of the AD converter 15 to achieve theaddition of the mixer outputs g₁ to g_(Q) through wired-sum. FIG. 2illustrates such a configuration.

When the carrier wave Mixk, which is modulated with the sensing signalf_(k), is selected from the signals ϕ₀ and ϕ_(π), the mixer output g_(k)outputted from the mixer 24 _(k) comprises information of an effectivesignal component for proximity sensing, in one or more embodiments. Whenthe carrier wave Mixk is selected from the signals ϕ_(π/2) and ϕ_(−π/2),the mixer output g_(k) comprises information of a noise component, inone or more embodiments. The signal level of the mixer output g_(k) isoriginally expected to be zero, when the carrier wave Mixk is selectedfrom the signals ϕ_(π/2) and ϕ_(−π/2), in one or more embodiments. Inone or more embodiments, when the signal level of the mixer output g_(k)is not zero, this indicates that the sensing signal f_(k) experiences aninfluence of noise. In one or more embodiments, the mixer output g_(k)may be used for noise detection, when the carrier wave Mixk is selectedfrom the signals ϕ_(π/2) and ϕ_(−π/2).

A periodic signal of a different phase from that of the signals ϕ₀ andϕ_(π) may be used in place of the signal ϕ_(π/2) or ϕ_(−π/2). In one ormore embodiments, the signal level of the mixer output g_(k)incorporates information of a noise component when a periodic signal ofa different phase from that of the signals ϕ₀ and ϕ_(π) is used as thecarrier wave Mixk. Also in this case, the mixer output g_(k) may be usedfor noise detection.

In one or more embodiments, the configuration of the encoder circuitry14 achieves code division multiplexing. In one or more embodiments,codes are assigned to the sensing signals f₁ to f_(Q). In one or moreembodiments, the phase shifter 23 is configured to select the carrierwave Mixk from among the signals ϕ_(−π/2), ϕ₀, ϕ_(π/2) and ϕ_(π) basedon the code assigned to the sensing signal f_(k) and supply the selectedcarrier wave Mixk to the mixer 24 _(k).

In one or more embodiments, the AD converter 15 is configured to performanalog-digital conversion on the sum signal of the mixer outputs g₁ tog_(Q) received from the mixers 24 ₁ to 24 _(Q) to output a digital datastream q.

In one or more embodiments, the decoder circuitry 16 constitutesprocessing circuitry configured to process the output of the ADconverter 15, that is, the digital data stream q, together with theprocessing unit 5. In one or more embodiments, the decoder circuitry 16is configured to decode the digital data stream q received from the ADconverter 15 to generate the digital outputs. In one or moreembodiments, the decoder circuitry 16 is configured to perform aproduct-sum operation to generate the digital outputs. In one or moreembodiments, the processing unit 5 is configured to perform arithmeticprocessing on the digital outputs from the decoder circuitry 16 toachieve proximity sensing of an object to the sensor array 1. In one ormore embodiments, this arithmetic processing may comprise processing fordetecting the position at which the object approaches or is in contactwith the sensor array 1.

In one or more embodiments, Q is an even number of four or more. In thiscase, Q can be represented as 2N, where N is an integer of two or more.It should be noted that the technologies of this disclosure areapplicable to a case where Q is an odd number of three or more, asdescribed later.

In one or more embodiments, as illustrated in FIG. 3, proximity sensingis performed in each sensing frame. In one or more embodiments, eachsensing frame comprises Q bursts, that is, 2N bursts. The 2N bursts maybe referred to as bursts #1 to #(2N), respectively. In one or moreembodiments, the drivers 21 ₁ to 21 _(2N) are configured to continueoutputting drive signals over bursts #1 to #(2N) with a constantwaveform.

In one or more embodiments, when a drive signal is supplied to thesensing electrode 3 _(i) with a constant waveform over bursts #1 to#(2N), the waveform of the sensing signal f_(i) is expected to remainunchanged over bursts #1 to #(2N), and therefore the waveform of themixer output g₁ outputted from the mixer 24 _(i) is also expected toremain unchanged over bursts #1 to #(2N). It is therefore expected thatthe following expressions (1) hold:

$\begin{matrix}{{{{A_{1}(t)} = {{A_{1}\left( {t + T} \right)} = {\ldots = {A_{1}\left( {t + {\left( {{2N} - 1} \right)T}} \right)}}}},{{A_{2}(t)} = {{A_{2}\left( {t + T} \right)} = {\ldots = {A_{2}\left( {t + {\left( {{2N} - 1} \right)T}} \right)}}}},\ldots}{{{A_{2N}(t)} = {{A_{2N}\left( {t + T} \right)} = {\ldots = {A_{2N}\left( {t + {\left( {{2N} - 1} \right)T}} \right)}}}},}} & (1)\end{matrix}$where t, t+T, . . . and t+(2N−1)T are the times when the AD converter 15samples the input signal during burst #1 to #(2N), respectively, andA₁(t) to A_(2N)(t) are the signal levels of the sensing signals f₁ tof_(2N) at time t.

For simplicity, the signal levels of the sensing signals f₁ to f_(2N) attimes t, t+T . . . and t+ (2N−1) may be simply referred to as A₁ toA_(2N). The signal levels on the inputs of the encoder circuitry 14,that is, the signal levels of the sensing signals f₁ to f_(2N) may becollectively represented by an input tensor a, which is represented bythe following expression (2):

$\begin{matrix}{a = {\begin{pmatrix}A_{1} \\A_{2} \\\vdots \\A_{2N}\end{pmatrix}.}} & (2)\end{matrix}$

In one or more embodiments, the processing performed by the encodercircuitry 14 during bursts #1 to #(2N) can be expressed as an encodetensor E defined by the following expression (3):

$\begin{matrix}{{E = \begin{pmatrix}e_{11} & \ldots & e_{1{({2N})}} \\\vdots & \ddots & \vdots \\e_{{({2N})}1} & \ldots & e_{{({2N})}{({2N})}}\end{pmatrix}},} & (3)\end{matrix}$where the j^(th) row of the encode tensor E represents the processingperformed during burst #j by the encoder circuitry 14, and the k^(th)column represents the modulation using the sensing signal f_(k). For acase where the mixer 24 ₁ to 24 _(Q) all have a gain of 1, for example,the element e_(jk) of the encode tensor E is e^(i0) (=1), e^(iπ/2) (=i),e^(iπ) (=−1), and e^(−iπ/2) (=−i) when the carrier wave Mixk, which ismodulated with the sensing signal f_(k), is the signal ϕ₀, ϕ_(π/2),ϕ_(π), and ϕ_(−π/2), respectively, during burst #j.

In one or more embodiments, the digital data stream q outputted from theAD converter 15 can be represented by the following expression (4):

$\begin{matrix}{{\begin{pmatrix}q_{1} \\q_{2} \\\vdots \\q_{2N}\end{pmatrix} = {{Ea} = {\begin{pmatrix}e_{11} & \ldots & e_{1{({2N})}} \\\vdots & \ddots & \vdots \\e_{{({2N})}1} & \ldots & e_{{({2N})}{({2N})}}\end{pmatrix}\begin{pmatrix}A_{1} \\A_{2} \\\vdots \\A_{2N}\end{pmatrix}}}},} & (4)\end{matrix}$

where q₁ to q_(2N) are the values of the digital data stream q duringbursts #1 to #(2N), respectively.

In one or more embodiments, when the carrier wave Mixk, which ismodulated with the sensing signal f_(k), is selected from the signals ϕ₀and ϕ_(π) during a certain burst, the sum signal supplied to the ADconverter 15 and the digital data stream q outputted from the ADconverter 15 comprise information of a signal component of the sensingsignal f_(k) effective for proximity sensing during the certain burst.In one or more embodiments, when the carrier wave Mixk is selected fromthe signals ϕ_(π/2) and ϕ_(−π/2) during a certain burst, the digitaldata stream q outputted from the AD converter 15 comprises informationof a noise component of the sensing signal f_(k) during the certainburst, in place of the component of the sensing signal f_(k) effectivefor proximity sensing.

In one or more embodiments, the digital outputs of the decoder circuitry16 are represented by an output tensor b_(X). In one or moreembodiments, the output tensor b_(X) can be represented by the followingexpression (5):b _(X) =XEa,  (5)where X is a decode tensor which represents matrix operations performedon the digital data stream q by the decoder circuitry 16 during bursts#1 to #(2N).

In one or more embodiments, the decode tensor X can demodulate the inputtensor a modulated with the encode tensor E when the product XE of theencode tensor E and the decode tensor X recited in expression (5) hasonly one non-zero element in each row.

In one or more embodiments, each of the carrier wave Mix1 to Mix(2N) isselected from the signals ϕ₀ and ϕ_(π) during two or more of bursts #1to #(2N) to suppress detection of a motion artifact. In one or moreembodiments, this operation increases the number of sampling ofinformation of effective signal components for proximity sensing pereach sensing frame with a reduced number of the AD converter 15, whileeffectively suppressing detection of a motion artifact. In one or moreembodiments, information of effective signal components for proximitysensing are sampled a plurality of times in each sensing frame, and thisallows increasing an effective sampling frequency, suppressing detectionof a motion artifact.

In one or more embodiments, each of the carrier waves Mix1 to Mix(2N) isselected from the signals ϕ₀ and ϕ_(π) during two of more of the bursts#1 to #(2N), and accordingly there are two or more real elements in eachcolumn of the encode tensor E. In one or more embodiments, the productXE of the encode tensor E and the decode tensor X has one non-zeroelement in each row under such restriction, due to appropriate selectionof the encode tensor E and the decode tensor X. In one or moreembodiments, such selection of the encode tensor E and the decode tensorX is achieved through appropriate selection of the carrier waves Mix1 toMix(2N) in the encoder circuitry 14 and appropriate design of the matrixoperation performed in the decoder circuitry 16.

In one or more embodiments, the sampling timing of effective signalcomponents for proximity sensing is evenly distributed in the timedomain. In one or more embodiments, bursts in which the carrier waveMixk, which is modulated with the sensing signal f_(k), is selected fromthe signals ϕ₀ and ϕ_(π) may be selected so that the selected bursts arenot adjacent to each other in the time domain. In one or moreembodiments, bursts in which the carrier wave Mixk is selected from thesignals ϕ₀ and ϕ_(π) and bursts in which the carrier wave Mixk isselected from the signals ϕ_(π/2) and ϕ−_(π/2) may be alternatelydisposed. This operation may effectively suppress detection of a motionartifact.

In one or more embodiments, sensing electrodes 3 from which informationof effective signal components for proximity sensing may be spatiallyevenly distributed. In one or more embodiments, for a pair of carrierwaves Mix(2p−1) and Mix(2p) modulated with sensing signals f_(2p-1) andf_(2p) associated with two sensing electrodes 3 spatially adjacent toeach other, one of the carrier waves Mix(2p−1) and Mix(2p) is selectedfrom the signals ϕ₀ and ϕ_(π) in a burst in which the other is selectedfrom the signals ϕ_(π/2) and ϕ_(−π/2). This operation may effectivelysuppress detection of a motion artifact.

In one or more embodiments, the noise detection may be achieved based onmixer outputs obtained by modulating the signal ϕ_(π/2) or ϕ_(−π/2) withthe sensing signals f₁ to f_(Q). In this case, the decoder circuitry 16is designed to extract a noise component generated by modulating thesignal ϕ_(π/2) or ϕ_(−π/2) with the sensing signals f₁ to f_(Q). In oneor more embodiments, the timing at which information of noise componentsis obtained is evenly distributed in the time domain. In one or moreembodiments, bursts in which the carrier wave Mixk, which is modulatedwith each sensing signal f_(k), is selected from the signals ϕ_(π/2) andϕ_(−π/2) are selected from bursts #1 to #(2N) so that the selectedbursts are not adjacent in the time domain. In one or more embodiments,the carrier wave Mixk is selected from the signals ϕ_(π/2) and ϕ−_(π/2)in every one burst. In one or more embodiments, the timing of obtainingthe noise components may be spatially evenly distributed. In one or moreembodiments, for a pair of carrier waves Mix(2p−1) and Mix(2p) modulatedwith sensing signals f_(2p-1) and f_(2p) associated with two sensingelectrodes 3 spatially adjacent to each other, one of the carrier wavesMix(2p−1) and Mix(2p) is selected from the signals ϕ₀ and ϕ_(π) in aburst in which the other is selected from the signals ϕ_(π/2) andϕ_(−π/2).

In one or more embodiments, the above-described conditions in whichtiming and positions for obtaining information of effective signalcomponents and information of the noise components are evenlydistributed can be described with an encode tensor E in which elementsof real numbers and elements of pure imaginary numbers are arranged in acheckered pattern. In this case, the encode tensor E can be representedby the following expression (6a) with two encode matrices E₁ and E₂represented by the following expressions (6b) and (6c), in one or moreembodiments:

$\begin{matrix}{{E = {E_{1} + {iE}_{2}}},} & \left( {6a} \right) \\{{E_{1} = \begin{pmatrix}e_{11} & \; & 0 & \ldots & e_{1{({{2N} - 1})}} & \; & 0 \\0 & \; & e_{22} & \; & 0 & \; & e_{2{({2N})}} \\\; & \vdots & \; & \ddots & \; & \vdots & \; \\e_{{({{2N} - 1})}1} & \; & 0 & \ldots & e_{{({{2N} - 1})}{({{2N} - 1})}} & \; & 0 \\0 & \; & e_{{({2N})}2} & \; & 0 & \; & e_{{({2N})}{({2N})}}\end{pmatrix}},{and}} & \left( {6b} \right) \\{{E_{2} = \begin{pmatrix}0 & \; & e_{12} & \ldots & 0 & \; & e_{1{({2N})}} \\e_{21} & \; & 0 & \; & e_{2{({{2N} - 1})}} & \; & 0 \\\; & \vdots & \; & \ddots & \; & \vdots & \; \\0 & \; & e_{{({{2N} - 1})}2} & \ldots & 0 & \; & e_{{({{2N} - 1})}{({2N})}} \\e_{{({2N})}1} & \; & 0 & \; & e_{{({2N})}{({{2N} - 1})}} & \; & 0\end{pmatrix}},} & \left( {6c} \right)\end{matrix}$where the element e_(ij) of the encode matrix E₁ is a non-zero realnumber for i+j being an even number, and zero for i+j being an oddnumber, while the element e_(ij) of the encode matrix E₂ is zero for i+jbeing an even number, and a non-zero real number for i+j being an oddnumber.

In one or more embodiments, the encode matrices E₁ and E₂ can berepresented by the following expressions (7a) and (7b) for a case whereN is two, that is, the number of the sensing electrodes 3 for one ADconverter 15 is four:

$\begin{matrix}{{E_{1} = \begin{pmatrix}e_{11} & 0 & e_{13} & 0 \\0 & e_{22} & 0 & e_{24} \\e_{31} & 0 & e_{33} & 0 \\0 & e_{42} & 0 & e_{44}\end{pmatrix}},{and}} & \left( {7a} \right) \\{E_{2} = {\begin{pmatrix}0 & e_{12} & 0 & e_{14} \\e_{21} & 0 & e_{23} & 0 \\0 & e_{32} & 0 & e_{34} \\e_{41} & 0 & e_{43} & 0\end{pmatrix}.}} & \left( {7b} \right)\end{matrix}$

In one or more embodiments, a 2×2 matrix O_(kl) in which one element is1 and the remaining elements are 0 is defined by the followingexpression (8):O _(kl)={δ_(ik)δ_(jt)},  (8)where δ_(ij) is the Kronecker delta. In one or more embodiments, thematrices O₁₁, O₂₂, O₁₂, and O₂₁ are represented by the followingexpressions (9a) to (9d):

$\begin{matrix}{{O_{11} = \begin{pmatrix}1 & 0 \\0 & 0\end{pmatrix}},} & \left( {9a} \right) \\{{O_{22} = \begin{pmatrix}0 & 0 \\0 & 1\end{pmatrix}},} & \left( {9b} \right) \\{{O_{12} = \begin{pmatrix}0 & 1 \\0 & 0\end{pmatrix}},{and}} & \left( {9c} \right) \\{O_{21} = {\begin{pmatrix}0 & 0 \\1 & 0\end{pmatrix}.}} & \left( {9d} \right)\end{matrix}$

In one or more embodiments, a partial matrix e_(kl) corresponding to the2×2 matrix O_(kl) is defined for an encode matrix by the followingexpression (10):e _(kl) ={e _((k+2(1−2))(l+(2j−1)))},  (10)where the partial matrix e_(kl) is an N×N matrix.

In one or more embodiments, the encode matrices E₁ and E₂ can berepresented with the partial matrix e_(kl) and the matrix Oki by thefollowing expressions (11a) and (11b):

$\begin{matrix}\begin{matrix}{E_{1} =} & {{\begin{pmatrix}e_{11} & \; & e_{13} & \ldots & e_{1{({{2N} - 1})}} \\e_{31} & \; & e_{33} & \; & e_{3{({{2N} - 1})}} \\\; & \vdots & \; & \ddots & \vdots \\e_{{({{2N} - 1})}1} & \; & e_{{({{2N} - 1})}3} & \cdots & e_{{({{2N} - 1})}{({{2N} - 1})}}\end{pmatrix} \otimes \begin{pmatrix}1 & 0 \\0 & 0\end{pmatrix}} +} \\ & {\begin{pmatrix}e_{22} & \; & e_{24} & \ldots & e_{2{({2N})}} \\e_{42} & \; & e_{44} & \; & e_{4{({2N})}} \\\; & \vdots & \; & \ddots & \vdots \\e_{{({2N})}2} & \; & e_{{({2N})}4} & \cdots & e_{{({2N})}{({2N})}}\end{pmatrix} \otimes \begin{pmatrix}0 & 0 \\0 & 1\end{pmatrix}} \\{=} & {{{e_{11} \otimes O_{11}} + {e_{22} \otimes O_{22}}},{and}}\end{matrix} & \left( {11a} \right) \\\begin{matrix}{E_{2} =} & {{\begin{pmatrix}e_{12} & \; & e_{14} & \ldots & e_{1{({2N})}} \\e_{32} & \; & e_{34} & \; & e_{3{({2N})}} \\\; & \vdots & \; & \ddots & \vdots \\e_{{({{2N} - 1})}2} & \; & e_{{({{2N} - 1})}4} & \cdots & e_{{({{2N} - 1})}{({2N})}}\end{pmatrix} \otimes \begin{pmatrix}0 & 1 \\0 & 0\end{pmatrix}} +} \\ & {\begin{pmatrix}e_{21} & \; & e_{23} & \ldots & e_{2{({{2N} - 1})}} \\e_{41} & \; & e_{43} & \; & e_{4{({{2N} - 1})}} \\\; & \vdots & \; & \ddots & \vdots \\e_{{({2N})}1} & \; & e_{{({2N})}3} & \cdots & e_{{({2N})}{({{2N} - 1})}}\end{pmatrix} \otimes \begin{pmatrix}0 & 0 \\1 & 0\end{pmatrix}} \\{=} & {{{e_{12} \otimes O_{12}} + {e_{21} \otimes O_{21}}},}\end{matrix} & \left( {11b} \right)\end{matrix}$where the operator ⊗ is the Kronecker product.

In one or more embodiments, the encode matrices E₁ and E₂ can berepresented by the following expressions (12a) and (12b) for a casewhere N is two, that is, the number of the sensing electrodes 3 for oneAD converter 15 is four:

$\begin{matrix}{{E_{1} = {{\begin{pmatrix}e_{11} & e_{13} \\e_{31} & e_{33}\end{pmatrix} \otimes \begin{pmatrix}1 & 0 \\0 & 0\end{pmatrix}} + {\begin{pmatrix}e_{22} & e_{24} \\e_{42} & e_{44}\end{pmatrix} \otimes \begin{pmatrix}0 & 0 \\0 & 1\end{pmatrix}}}},{and}} & \left( {12a} \right) \\{E_{2} = {{\begin{pmatrix}e_{12} & e_{14} \\e_{32} & e_{34}\end{pmatrix} \otimes \begin{pmatrix}0 & 1 \\0 & 0\end{pmatrix}} + {\begin{pmatrix}e_{21} & e_{23} \\e_{41} & e_{43}\end{pmatrix} \otimes {\begin{pmatrix}0 & 0 \\1 & 0\end{pmatrix}.}}}} & \left( {12b} \right)\end{matrix}$In one or more embodiments, the partial matrices e₁₁ and e₂₂ of theencode matrix E₁ and the partial matrices e₁₂ and e₂₁ of the encodematrix E₂ are 2×2 matrices, and it would be understood that expressions(11a) and (11b) hold for N being 2 when these partial matrices aredefined by the following expressions (13a) to (13d):

$\begin{matrix}{{e_{11} = \begin{pmatrix}e_{11} & e_{13} \\e_{31} & e_{33}\end{pmatrix}},} & \left( {13a} \right) \\{{e_{22} = \begin{pmatrix}e_{22} & e_{24} \\e_{42} & e_{44}\end{pmatrix}},} & \left( {13b} \right) \\{{e_{12} = \begin{pmatrix}e_{12} & e_{14} \\e_{32} & e_{34}\end{pmatrix}},{and}} & \left( {13c} \right) \\{e_{21} = {\begin{pmatrix}e_{21} & e_{23} \\e_{41} & e_{43}\end{pmatrix}.}} & \left( {13d} \right)\end{matrix}$

In one or more embodiments, the encode tensor E is represented by thefollowing expression (14):

$\begin{matrix}{{E = {\sum\limits_{m}{V_{m} \otimes E_{m}}}},} & (14)\end{matrix}$where the encode matrix E_(m) corresponds to a basic lineartransformation W_(m).

In one or more embodiments the decode tensor X is represented by thefollowing expression (15):

$\begin{matrix}{{X = {\sum\limits_{m}{W_{m} \otimes X_{m}}}},} & (15)\end{matrix}$where the decode matrix X_(m) corresponds to a basic lineartransformation W_(m).

In this case, the output tensor b_(x) is represented by the followingexpression (16), in one or more embodiments:

$\begin{matrix}\begin{matrix}{{b_{X} = {XEa}},} \\{= {\left( {\sum\limits_{k = 0}^{M - 1}{\left( V_{k + 1} \right) \otimes \left( {{- {\sum\limits_{m = 1}^{k}{X_{M - {({k - m})}}E_{m}}}} + {\sum\limits_{m = {k + 1}}^{M}{X_{({m - k})}E_{m}}}} \right)}} \right)a}} \\{= {{\left( {V_{1} \otimes \left( {{X_{1}E_{1}} + {X_{2}E_{2}}} \right)} \right)a} + {\left( {V_{2} \otimes \left( {{{- X_{2}}E_{1}} + {X_{1}E_{2}}} \right)} \right){a.}}}}\end{matrix} & (16)\end{matrix}$In the final line of expression (16), M is selected as being 2. In thiscase, matrices V₁ and V₂ are selected as basic linear transformationsfor expression (14), and matrices W₁ and W₂ are selected as basic lineartransformations for expression (15), where the matrices V₁ and V₂ areorthogonal to each other, and the matrices W₁ and W₂ are orthogonal toeach other.

In one or more embodiments, the product XE of the encode tensor E andthe decode tensor X is represented by the following expression (17):

$\begin{matrix}\begin{matrix}{{XE} = {\sum\limits_{k = 0}^{M - 1}{\left( V_{k + 1} \right) \otimes \left( {{- {\sum\limits_{m = 1}^{k}{X_{M - {({k - m})}}E_{m}}}} + {\sum\limits_{m = {k + 1}}^{M}{X_{({m - k})}E_{m}}}} \right)}}} \\{= {{V_{1} \otimes \left( {{X_{1}E_{1}} + {X_{2}E_{2}}} \right)} + {V_{2} \otimes {\left( {{{- X_{2}}E_{1}} + {X_{1}E_{2}}} \right).}}}}\end{matrix} & (17)\end{matrix}$In one or more embodiments, the decode tensor X can decode the inputtensor a modulated with the encode tensor E when the product XE, whichis represented by expression (17), has only one non-zero element in eachrow.

In one or more embodiments, the decode matrices X₁ and X₂ can berepresented by the following expressions (18) and (19) with the matrixO_(kl):

$\begin{matrix}\begin{matrix}{X_{1} = \begin{pmatrix}x_{11} & x_{12} & \ldots & x_{1{({2N})}} \\x_{21} & x_{22} & \; & x_{2{({2N})}} \\\; & {\vdots\;} & \ddots & \vdots \\x_{{({2N})}1} & x_{{({2N})}2} & \ldots & x_{{({2N})}{({2N})}}\end{pmatrix}} \\{= {{\begin{pmatrix}x_{11} & x_{13} & \ldots & x_{1{({{2N} - 1})}} \\x_{31} & x_{33} & \; & x_{3{({{2N} - 1})}} \\\vdots & \; & \ddots & \vdots \\x_{{({{2N} - 1})}1} & x_{{({{2N} - 1})}3} & \ldots & x_{{({{2N} - 1})}{({{2N} - 1})}}\end{pmatrix} \otimes \begin{pmatrix}1 & 0 \\0 & 0\end{pmatrix}} +}} \\{{\begin{pmatrix}x_{12} & x_{14} & \ldots & x_{1{({2N})}} \\x_{32} & x_{34} & \; & x_{3{({2N})}} \\\vdots & \; & \ddots & \vdots \\x_{{({{2N} - 1})}2} & x_{{({{2N} - 1})}4} & \ldots & x_{{({{2N} - 1})}{({2N})}}\end{pmatrix} \otimes \begin{pmatrix}0 & 1 \\0 & 0\end{pmatrix}} +} \\{{\begin{pmatrix}x_{21} & x_{23} & \ldots & x_{2{({{2N} - 1})}} \\x_{41} & x_{43} & \; & x_{4{({{2N} - 1})}} \\\vdots & \; & \ddots & \vdots \\x_{{({2N})}1} & x_{{({2N})}3} & \ldots & x_{{({2N})}{({{2N} - 1})}}\end{pmatrix} \otimes \begin{pmatrix}0 & 0 \\1 & 0\end{pmatrix}} +} \\{\begin{pmatrix}x_{22} & x_{24} & \ldots & x_{2{({2N})}} \\x_{42} & x_{44} & \; & x_{4{({2N})}} \\\vdots & \; & \ddots & \vdots \\x_{{({2N})}2} & x_{{({2N})}4} & \ldots & x_{{({2N})}{({2N})}}\end{pmatrix} \otimes \begin{pmatrix}0 & 0 \\0 & 1\end{pmatrix}} \\{{= {{x_{11} \otimes O_{11}} + {x_{12} \otimes O_{12}} + {x_{21} \otimes O_{22}} + {x_{22} \otimes O_{22}}}},{and}}\end{matrix} & (18) \\\begin{matrix}{X_{2} = \begin{pmatrix}y_{11} & y_{12} & \ldots & y_{1{({2N})}} \\y_{21} & y_{22} & \; & y_{2{({2N})}} \\\; & {\vdots\;} & \ddots & \vdots \\y_{{({2N})}1} & y_{{({2N})}2} & \ldots & y_{{({2N})}{({2N})}}\end{pmatrix}} \\{= {{\begin{pmatrix}y_{11} & y_{13} & \ldots & y_{1{({{2N} - 1})}} \\y_{31} & y_{33} & \; & y_{3{({{2N} - 1})}} \\\vdots & \; & \ddots & \vdots \\y_{{({{2N} - 1})}1} & y_{{({{2N} - 1})}3} & \ldots & y_{{({{2N} - 1})}{({{2N} - 1})}}\end{pmatrix} \otimes \begin{pmatrix}1 & 0 \\0 & 0\end{pmatrix}} +}} \\{{\begin{pmatrix}y_{12} & y_{14} & \ldots & y_{1{({2N})}} \\y_{32} & y_{34} & \; & y_{3{({2N})}} \\\vdots & \; & \ddots & \vdots \\y_{{({{2N} - 1})}2} & y_{{({{2N} - 1})}4} & \ldots & y_{{({{2N} - 1})}{({2N})}}\end{pmatrix} \otimes \begin{pmatrix}0 & 1 \\0 & 0\end{pmatrix}} +} \\{{\begin{pmatrix}y_{21} & y_{23} & \ldots & y_{2{({{2N} - 1})}} \\y_{41} & y_{43} & \; & y_{4{({{2N} - 1})}} \\\vdots & \; & \ddots & \vdots \\y_{{({2N})}1} & y_{{({2N})}3} & \ldots & y_{{({2N})}{({{2N} - 1})}}\end{pmatrix} \otimes \begin{pmatrix}0 & 0 \\1 & 0\end{pmatrix}} +} \\{\begin{pmatrix}y_{22} & y_{24} & \ldots & y_{2{({2N})}} \\y_{42} & y_{44} & \; & y_{4{({2N})}} \\\vdots & \; & \ddots & \vdots \\y_{{({2N})}2} & y_{{({2N})}4} & \ldots & y_{{({2N})}{({2N})}}\end{pmatrix} \otimes \begin{pmatrix}0 & 0 \\0 & 1\end{pmatrix}} \\{{= {{y_{11} \otimes O_{11}} + {y_{12} \otimes O_{12}} + {y_{21} \otimes O_{22}} + {y_{22} \otimes O_{22}}}},}\end{matrix} & (19)\end{matrix}$where the matrices x₁₁, x₁₂, x₂₁, and x₂₂ in expressions (18) arepartial matrices of the decode matrix X₁, and the matrices y₁₂, y₂₁, andy₂₂ in expressions (19) are partial matrices of the decode matrix X₂.

In one or more embodiments, due to the characteristics of the matrixO_(kl), matrices which are included in the product XE of the encodetensor E and the decode tensor X and correspond to the basic lineartransformations V₁ and V₂ are represented by the following expressions(20) and (21):

$\begin{matrix}{{{{X_{1}E_{1}} + {X_{2}E_{2}}} = {{{\left( {x_{11}e_{11}} \right) \otimes O_{11}} + {\left( {x_{12}e_{22}} \right) \otimes O_{12}} + {\left( {x_{21}e_{11}} \right) \otimes O_{21}} + {\left( {x_{22}e_{22}} \right) \otimes O_{22}} + {\left( {y_{12}e_{21}} \right) \otimes O_{11}} + {\left( {y_{11}e_{12}} \right) \otimes O_{12}} + {\left( {y_{22}e_{21}} \right) \otimes O_{21}} + {\left( {y_{21}e_{12}} \right) \otimes O_{22}}} = {{\left( {{x_{11}e_{11}} + {y_{12}e_{21}}} \right) \otimes O_{11}} + {\left( {{x_{12}e_{22}} + {y_{11}e_{12}}} \right) \otimes O_{12}} + {\left( {{x_{21}e_{11}} + {y_{22}e_{21}}} \right) \otimes O_{21}} + {\left( {{x_{22}e_{22}} + {y_{21}e_{12}}} \right) \otimes O_{22}}}}},{and}} & (20) \\{{{{- X_{2}}E_{1}} + {X_{1}E_{2}}} = {{\left( {{{- y_{11}}e_{11}} + {x_{12}e_{21}}} \right) \otimes O_{11}} + {\left( {{{- y_{12}}e_{22}} + {x_{11}e_{12}}} \right) \otimes O_{12}} + {\left( {{{- y_{21}}e_{11}} + {x_{22}e_{21}}} \right) \otimes O_{21}} + {\left( {{{- y_{22}}e_{22}} + {x_{21}e_{12}}} \right) \otimes {O_{22}.}}}} & (21)\end{matrix}$

In one or more embodiments, the following eight equations to be solvedare obtained based on the above-described matrices corresponding to thebasic linear transformations V₁ and V₂ from the condition that theproduct XE of the encode tensor E and the decode tensor X has only onenon-zero element in each row:x ₁₁ e ₁₁ +y ₁₂ e ₂₁ =c ₁δ_(1g) O ₁₁ +c ₂δ_(1g′) O ₂₂,x ₁₂ e ₂₂ +y ₁₁ e ₁₂ =c ₃δ_(2g) O ₁₁ +c ₄δ_(2g′) O ₂₂,−y ₁₁ e ₁₁ +x ₁₂ e ₂₁ =c ₅δ_(3g) O ₁₁ +c ₆δ_(4g′) O ₂₂,−y ₁₂ e ₂₂ +x ₁₁ e ₁₂ =c ₇δ_(4g) O ₁₁ +c ₈δ_(4g′) O ₂₂,x ₂₁ e ₁₁ +y ₂₂ e ₂₁ =c ₁₁δ_(2h) O ₁₁ +c ₁₀δ_(1h′) O ₂₂,x ₂₂ e ₂₂ +y ₂₁ e ₁₂ =c ₁₁δ_(2h) O ₁₁ +c ₁₂δ_(2h′) O ₂₂,−y ₂₁ e ₁₁ +x ₂₂ e ₂₁ =c ₁₁δ_(2h) O ₁₁ +c ₁₂δ_(3h′) O ₂₂, and−y ₂₂ e ₂₂ +x ₂₁ e ₁₂ =c ₁₅δ_(4h) O ₁₁ +c ₁₆δ_(4h′) O ₂₂,  (22)where c₁ to c₁₆ are arbitrary constants, and g, g′, h, and h′ are anyinteger from one to four.

In one or more embodiments, when there is a solution to the eightequations (22), the product XE of the encode tensor E and the decodetensor X has only one non-zero element in each row, allowingdemodulation of the input tensor a. In one embodiment, the partialmatrices e₁₁, e₁₂, e₂₁, and e₂₂ of the encode matrices E₁ and E₂ areequal to an arbitrary regular matrix e, that is, it holds:e ₁₁ =e ₁₂ =e ₂₁ =e ₂₂ =e,  (23)and the following expressions (24a) and (24b) hold for the partialmatrices x₁₁, x₁₂, x₂₁, and x₂₂ of the decode matrix X₁ and the partialmatrices y₁₂, y₂₁ and y₂₂ of the decode matrix X₂:x ₁₁ =y ₁₂ =x ₂₁ =−y ₂₂=2(e)⁻¹, and   (24a)−y ₁₁ =x ₁₂ =y ₂₁ =x ₂₂=2(e)⁻¹.  (24b)

In one or more embodiments, the input tensor a is reproduced as theoutput tensor b_(x) through selecting the partial matrices of the encodematrices E₁ and E₂ and the decode matrices X₁ and X₂ so as to satisfythe above-described expressions (23), (24a) and (24b). In one or moreembodiments, this allows obtaining information of the signal levels A₁to A_(2N) of the sensing signals f₁ to f_(2N) as the digital outputs ofthe decode circuitry 16.

In one or more embodiments, the solution space of the eight equations(22) is narrowed by adding constraint conditions. In one or moreembodiments, the circuit size of the decoder circuitry 16 isadditionally reduced by appropriately defining the constraintconditions.

In one or more embodiments, the decode matrices are selected so that twoor more different basic linear transformations do not appear in eachcolumn, and thereby the number of linear transformation circuitssimultaneously operate in the decoder circuitry 16 is reduced to one.This is advantageous in terms of the circuit size and the control logicsize.

In one or more embodiments, the variable matrices related to the decodematrices X₁ and X₂ are degenerated by using matrices X_(1a) and X_(2a)as the decode matrices X₁ and X₂ so that only four matrices x₁₁, x₂₁,y₁₂, and y₂₂ are variable matrices, where the matrix X_(1a) is definedso that the elements in the even columns are zero as recited inexpression (25), and the matrix X_(2a) is defined so that the elementsin the odd columns are zero as recited in expression (26):

$\begin{matrix}\begin{matrix}{X_{1a} = \begin{pmatrix}x_{11} & 0 & \ldots & x_{1{({{2N} - 1})}} & 0 \\x_{21} & 0 & \; & x_{2{({{2N} - 1})}} & 0 \\\vdots & \; & \ddots & \vdots & \; \\x_{{({{2N} - 1})}1} & 0 & \ldots & x_{{({{2N} - 1})}{({{2N} - 1})}} & 0 \\x_{{({2N})}1} & 0 & \; & x_{{{({2N})})}{({{2N} - 1})}} & 0\end{pmatrix}} \\{{= {{x_{11} \otimes O_{11}} + {x_{21} \otimes O_{21}}}},{and}}\end{matrix} & (25) \\\begin{matrix}{X_{2a} = \begin{pmatrix}0 & y_{12} & \ldots & 0 & y_{1{({2N})}} \\0 & y_{22} & \; & 0 & y_{2{({2N})}} \\\; & {\vdots\;} & \ddots & \; & \vdots \\0 & y_{{({{2N} - 1})}2} & \ldots & 0 & y_{{({{2N} - 1})}{({2N})}} \\0 & y_{{({2N})}2} & \; & 0 & y_{{({2N})}{({2N})}}\end{pmatrix}} \\{= {{y_{12} \otimes O_{12}} + {y_{22} \otimes {O_{22}.}}}}\end{matrix} & (26)\end{matrix}$

In this case, the matrices which are included in the product XE andcorrespond to the basic linear transformations V₁ and V₂ are representedby the following expressions (27) and (28), in one or more embodiments:X _(1a) E ₁ +X _(2a) E ₂=(x ₁₁ e ₁₁ +y ₁₂ e ₂₁)⊗O ₁₁+(x ₂₁ e ₁₁ +y ₂₂ e₂₁)⊗O ₂₁, and  (27)−X _(2a) E ₁ +X _(1a) E ₂=(−y ₁₂ e ₂₂ +x ₁₁ e ₁₂)⊗O ₁₂  (28)

In one or more embodiments, the condition to reproduce the input tensora, that is, the condition that the product XE of the encode tensor E andthe decode tensor X has only one non-zero element in each row can bemore restricted as recited in expressions (29):x ₁₁ e ₁₁ +y ₁₂ e ₂₁ =c ₁δ_(1g) I,−y ₁₂ e ₂₂ +x ₁₁ e ₁₂ =c ₂δ_(2g) I,x ₂₁ e ₁₁ +y ₂₂ e ₂₁ =c ₃δ_(2g) I, and−y ₂₂ e ₂₂ +x ₂₁ e ₁₂ =c ₄δ_(1g) I,   (29)where I is the unit matrix, c₁, c₂, c₃, and c₄ are arbitrary constants,and g is an integer of 1 or 2. This is based on the fact that, if aplurality of non-zero elements appear in the same row of the matricescorresponding to the basic linear transformations V₁ and V₂, this is avalueless and redundant decode result.

There actually exists a solution to the four equations (29), althoughthe solution is non-unique because of the existence of eight variablematrices and one variable g. For example, the partial matrices e₁₁, e₂₁,e₁₂, e₂₂, x₁₁, X₂₁, y₁₂, and y₂₂ satisfying the expressions (23) and(24a) are a solution to the four equations (29).

In one or more embodiments, the variable matrices related the decodematrices X₁ and X₂ are degenerated by using matrices X_(1b) and X_(2b)as the decode matrices X₁ and X₂ so that only four matrices x₁₂, x₂₂,y₁₁, and y₂₁ are variable matrices, where the matrix X_(1b) is definedso that the elements in the odd columns are zero as recited inexpression (30) and the matrix X_(2b) is defined so that the elements inthe even columns are zero as recited in expression (31):

$\begin{matrix}\begin{matrix}{X_{1b} = \begin{pmatrix}0 & x_{12} & \ldots & 0 & x_{1{({2N})}} \\0 & x_{22} & \; & 0 & x_{2{({2N})}} \\\; & \vdots & \ddots & \; & \vdots \\0 & x_{{({{2N} - 1})}2} & \ldots & 0 & x_{{({{2N} - 1})}{({2N})}} \\0 & x_{{({2N})}2} & \; & 0 & x_{{({2N})}{({2N})}}\end{pmatrix}} \\{{= {{x_{12} \otimes O_{12}} + {x_{22} \otimes O_{22}}}},{and}}\end{matrix} & (30) \\\begin{matrix}{X_{2b} = \begin{pmatrix}y_{11} & 0 & \ldots & y_{1{({{2N} - 1})}} & 0 \\y_{21} & 0 & \; & y_{2{({{2N} - 1})}} & 0 \\\vdots & \; & \ddots & \vdots & \; \\y_{{({{2N} - 1})}1} & 0 & \ldots & y_{{({{2N} - 1})}{({{2N} - 1})}} & 0 \\y_{{({2N})}1} & 0 & \; & y_{{({2N})}{({{2N} - 1})}} & 0\end{pmatrix}} \\{= {{y_{11} \otimes O_{11}} + {y_{21} \otimes {O_{21}.}}}}\end{matrix} & (31)\end{matrix}$

In this case, the matrices which are included in the product XE andcorrespond to the basic linear transformations V₁ and V₂ are representedby the following expressions (32) and (33), in one or more embodiments:X _(1b) E ₁ +X _(2b) E ₂=(x ₁₂ e ₂₂ +y ₁₁ e ₂₂ +y ₁₁ e ₁₂)⊗O ₁₂+(x ₂₂ e₂₂ +y ₂₁ e ₁₂)⊗O ₂₂, and  (32)−X _(2b) E ₁ +X _(1b) E ₂=(−y ₁₁ e ₁₁ +x ₁₂ e ₂₁)⊗O ₁₁+(−y ₂₁ e ₁₁ +x ₂₂e ₂₁)⊗O ₂₁.  (33)

In one or more embodiments, the condition to demodulate the input tensora, that is, the condition that the product XE of the encode tensor E andthe decode tensor X has only one non-zero element in each row can bemore restricted as recited in expressions (34):−y ₁₁ e ₁₁ +x ₁₂ e ₂₁ =c ₅δ_(1g) I,x ₁₂ e ₂₂ +y ₁₁ e ₁₂ =c ₆δ_(2g) I,−y ₂₁ e ₁₁ +x ₂₂ e ₂₁ =c ₇δ_(1g) I, andx ₂₂ e ₂₂ +y ₂₁ e ₁₂ =c ₈δ_(1g) I.   (34)

There actually exists a solution to the four equations (34), althoughthe solution is non-unique due to the existence of eight variablematrices and one variable g. For example, the partial matrices e₁₁, e₂₁,e₁₂, e₂₂, x₁₂, x₂₂, y₁₁ and y₂₁ satisfying the expressions (23) and(24b) are a solution to the four equations (34).

In one or more embodiments, after a solution satisfying the expression(22), (29) or (34) is obtained, the encoder circuitry 14 is designed toselect the carrier waves Mix1 to Mix(2N) based on the encode tensor E ofthe obtained solution, and the decoder circuitry 16 is designed toperform product-sum operations in accordance with the decode tensor X ofthe obtained solution.

The values q₁ to q_(2N) of the digital data stream q outputted from theAD converter 15, which are represented by expression (4), incorporateinformation of noise components as well as information of the effectivesignal components, where the effective signal components correspond toinformation generated by modulating the signals ϕ₀ and ϕ_(π) with thesensing signal f₁ to f_(2N), and the noise components correspond toinformation generated by modulating the signals ϕ_(π/2) and ϕ_(−π/2)with the sensing signal f₁ to f_(2N). In one or more embodiments, noisedetection may be achieved by designing the decoder circuitry 16 toextract information generated by modulating the signals ϕ_(π/2) andϕ_(−π/2) with the sensing signals f₁ to f_(2N).

To extract information generated by modulating carrier waves havingphases different from the phases of the signals ϕ₀ and ϕ_(π), forexample, the signals ϕ_(π/2) and ϕ_(−π/2), with the sensing signals f₁to f_(2N) in addition to information generated by modulating the signalsϕ₀ and t with the sensing signals f₁ to f_(2N), in one or moreembodiments, decode matrices X_(a) and X_(b) obtained by the followingexpressions (35) from the decode matrices X_(1a) and X_(2a) and thedecode matrices X_(1b) and X_(2b) may be used in the decoder circuitry16, where the decode matrices X_(1a) and X_(2a) are a solution toequation (29) and the decode matrices X_(1b) and X_(2b) are a solutionto equation (34):X _(a) =X _(1a) −iX _(2a), andX _(b) =X _(1b) −iX _(2b).  (35)

In one or more embodiments, the decode matrix X_(a) is applied to thedigital data stream q to obtain the output tensor b_(x) so that oddelements thereof correspond to information generated by modulating thesignal ϕ₀ or ϕ_(π) with the sensing signals f₁ to f_(2N), that is,information of effective signal components, and even elements thereofcorrespond to information generated by modulating the signal ϕ_(π/2) orϕ_(−π/2) with the sensing signals f₁ to f_(2N), that is, information ofnoise components. In one or more embodiments, the decode matrix X_(b) isapplied to the digital data stream q to obtain the output tensor b_(x)so that odd elements thereof correspond to information of noisecomponents, and even elements thereof correspond to information ofeffective signal components. In one or more embodiments, the decodematrices X_(a) and X_(b) are applied to the digital data stream qoutputted from the AD converter 15 in the decoder circuitry 16 to obtaindigital outputs corresponding to the effective signal components anddigital outputs corresponding to the noise components.

In one or more embodiments, the processing unit 5 may be configured toachieve proximity sensing based on the digital outputs corresponding tothe effective signal components and achieve noise detection based on thedigital outputs corresponding to the noise components. In one or moreembodiments, when detecting existence of noise based on the digitaloutputs corresponding to the noise components in a sensing frame, theprocessing unit 5 may discard data of the digital outputs correspondingto the effective signal components obtained for this sensing frame. Insuch an embodiment, proximity sensing of an object to the sensor array 1may be achieved based on the digital outputs corresponding to theeffective signal components obtained in a sensing frame for which nonoise is detected.

The above-described techniques of this disclosure is applicable to acase where Q is an odd number of three or more, for example, a casewhere Q is 2N−1 for N being an integer of two or more. In this case, asimilar calculation to that described above is performed with anassumption that the signal level A_(2N) of the sensing signal f_(2N) iszero during all of bursts #1 to #(2N), in one or more embodiments. Inone or more embodiments, the calculation result with respect to thesensing signal f_(2N) is discarded in the decoder circuitry 16.

In one or more embodiments the capacitive sensing circuitry 4 isconfigured based on a solution for a case where Q=4 and N=2, that is,one AD converter 15 is prepared for four sensing electrodes 3.

When N=2, the encode tensor E is a 4×4 matrix and the encode matrices E₁and E₂ are represented by expressions (7a) and (7b), in one or moreembodiments. In one or more embodiments, the partial matrices e₁₁, e₁₂,e₂₁, and e₂₂ of the encode matrices E₁ and E₂, the partial matrices x₁₁,x₂₁, x₁₂, and x₂₂ of the decode matrix X₁, and the partial matrices y₂₁,y₁₂, and y₂₂ of the decode matrix X₂ are all 2×2 matrices.

In one or more embodiments, all of the elements of the encoder matricesE₁ and E₂ are selected from +1 or −1 to eliminate a need for providing avariable gain stage for the encoder circuitry 14. This may beadvantageous in terms of the circuit size. In one or more embodiments, asimilar approach may be applied to the decode matrices X₁ and X₂ and thedecoder circuitry 16. In view of this, in one or more embodiments, thepartial matrices e₁₁, e₁₂, e₂₁, and e₂₂ of the encode matrices E₁ andE₂, the partial matrices X₁₁, X₂₁, X₁₂, and X₂₂ of the decode matrix X₁,and the partial matrices y₁₁, y₂₁, y₁₂, and y₂₂ of the decode matrix X₂are selected from 16 2×2 matrices defined by the following expressions(36):

$\begin{matrix}{{{\pm M_{0}} = {\pm \begin{pmatrix}1 & 1 \\1 & 1\end{pmatrix}}},} & (36) \\{{{\pm M_{1}} = {\pm \begin{pmatrix}1 & {- 1} \\{- 1} & 1\end{pmatrix}}},} & \; \\{{{\pm M_{2}} = {\pm \begin{pmatrix}1 & {- 1} \\1 & {- 1}\end{pmatrix}}},} & \; \\{{{\pm M_{3}} = {\pm \begin{pmatrix}1 & 1 \\{- 1} & {- 1}\end{pmatrix}}},} & \; \\{{{\pm M_{4}} = {\pm \begin{pmatrix}1 & 1 \\1 & {- 1}\end{pmatrix}}},} & \; \\{{{\pm M_{5}} = {\pm \begin{pmatrix}{- 1} & 1 \\1 & 1\end{pmatrix}}},} & \; \\{{{\pm M_{6}} = {\pm \begin{pmatrix}1 & {- 1} \\1 & 1\end{pmatrix}}},{and}} & \; \\{{\pm M_{7}} = {\pm {\begin{pmatrix}1 & 1 \\{- 1} & 1\end{pmatrix}.}}} & \;\end{matrix}$

In one or more embodiments, the partial matrices of the encode matricesand the decode matrices are all defined as being regular to simplify thecalculation; this allows handling the partial matrices of the decodematrices as integer multiples of the inverse matrices of the partialmatrices of the encode matrices. In one or more embodiments, thesolution space is accordingly restricted in accordance with thefollowing expressions (37) and (38):e _(kl) ∈{±M ₄ ,±M ₅ ,±M ₆ ,±M ₇},  (37)x _(kl) ∈{±M ₄ ,±M ₅ ,±M ₆ ,±M ₇}, andy _(kl) ∈{±M ₄ ,±M ₅ ,±M ₆ ,±M ₇},  (38)

In one or more embodiments, the restriction of the solution space withrespect to the partial matrices x_(kl) and y_(kl) of the decode matricesis based on the relations recited in expressions (39):±M ₄=±2(M ₄)⁻¹,±M ₅=±2(M ₅)⁻¹,±M ₆=±2(M ₇)⁻¹, and±M ₇=±2(M ₆)⁻¹,   (39)

In one or more embodiments, for the case where the partial matrices ofthe encode matrices are regular, g=1, and c₁=c₂=c₃=c₄=4, one of the mostsimple examples of the partial matrices of the encode matrices and thedecode matrices satisfying the following expressions (40) is representedby the following expressions (41):x ₁₁ e ₁₁ +y ₁₂ e ₂₁ =c ₁δ_(1g) I,−y ₁₂ e ₂₂ +x ₁₁ e ₁₂ =c ₂δ_(2g) I,x ₂₁ e ₁₁ +y ₂₂ e ₂₁ =c ₃δ_(2g) I,−y ₂₂ e ₂₂ +x ₂₁ e ₁₂ =c ₄δ_(1g) I,−y ₂₂ e ₂₂ +x ₂₁ e ₁₂ =c ₄δ_(1g) I,  (40)e ₂₂ =e ₂₁ =e ₁₂ =e ₁₁,x ₁₁ =y ₁₂ =x ₂₁=(e ₁₁)⁻¹, andy ₂₂=−(e ₁₁)⁻¹.  (41)

In one or more embodiments, the solution space is restricted inaccordance with expressions (37) and (38). In such an embodiment, withrespect to partial matrices of the encode matrices and partial matricesof the decode matrices, a sum or difference of two matrix productsbecomes an integer multiple of the unit matrix only when the two matrixproducts are each an integer multiple of the unit matrix. In one or moreembodiments, expression (22) can be accordingly rewritten into thefollowing expressions (42) for g being 1:x ₁₁ e ₁₁ +y ₁₂ e ₂₁ =c ₁ I,−y ₁₂ e ₂₂ +x ₁₁ e ₁₂=0,x ₂₁ e ₁₁ +y ₂₂ e ₂₁=0,−y ₁₁ e ₁₁ +x ₁₂ e ₂₁ =c ₄ I,−y ₁₁ e ₁₁ +x ₁₂ e ₂₁ =c ₅ I,x ₁₂ e ₂₂ +y ₁₁ e ₁₂=0,−y ₂₁ e ₁₁ +x ₂₂ e ₂₁=0, andx ₂₂ e ₂₂ +y ₂₁ e ₁₂ =c ₈ I.  (42)

In one or more embodiments, the following expressions (43) can beobtained from expressions (42):x ₁₁=2(e ₁₁)⁻¹,−y ₁₁=2(e ₁₁)⁻¹ =x ₁₁,x ₁₂=2(e ₂₁)⁻¹,y ₁₂=2(e ₂₁)⁻¹ =x ₁₂,x ₂₁=2(e ₁₂)⁻¹,y ₂₁=2(e ₁₂)⁻¹ =x ₂₁,x ₂₂=2(e ₂₂)⁻¹,y ₂₂=2(e ₂₂)⁻¹ =x ₂₂,c ₁=4,c ₂=4,c ₃=4,andc ₄=4,  (43)In one or more embodiments, coefficients of 2 appear in expressions(43), because partial matrices of the decode matrices have coefficientsof 2, when the partial matrices of the decode matrices are integermultiples of the partial matrices of the encode matrices.

In one or more embodiments, the following four equations (44) in whichthe right sides are zero matrices are equivalent to one another:−y ₁₂ e ₂₂ +x ₁₁ e ₁₂=0,x ₂₁ e ₁₁ +y ₂₂ e ₂₁=0,x ₁₂ e ₂₂ +y ₁₁ e ₁₂=0, and−y ₂₁ e ₁₁ +x ₂₂ e ₂₁=0,  (44)because, when products of regular matrices are equal, the inversematrices thereof are equal. In one or more embodiments, this equivalenceis obtained from the following expressions (45) and (46):x ₁₁ e ₁₂ =y ₁₂ e ₂₂,(x ₁₁ e ₁₂)⁻¹=(y ₁₂ e ₂₂)⁻¹,(e ₁₂)⁻¹(x ₁₁)⁻¹=(e ₂₂)⁻¹(y ₁₂)⁻¹,x ₂₁ e ₁₁ =−y ₂₂ e ₂₁,  (45)−y ₁₁ =x ₁₁,x ₁₂ =y ₁₂,y ₂₁ =x ₂₁, andx ₂₂ =−y ₂₂.  (46)In one or more embodiments, based on this equivalence, a solution isobtained by searching two pairs of regular 2×2 matrices for which thematrix products are equal to each other. In one or more embodiments,there is a plurality of pairs satisfying this requirement.

Because of the characteristics of a matrix product, a matrix productremains unchanged even when two columns of the multiplying matrix andtwo rows of the matrix to be multiplied are exchanged at the same time.Furthermore, a matrix product remains unchanged even when the sign of acolumn of the multiplying matrix and signs of corresponding two rows ofthe matrix to be multiplied are inverted at the same time. With respectto solutions related to partial matrices e_(kl) of the encode matricesto be multiplied, based on the relationships represented by thefollowing expressions (47):

$\begin{matrix}{{{\pm M_{4}} = {{\pm \begin{pmatrix}0 & 1 \\1 & 0\end{pmatrix}}\mspace{14mu} M_{6}}},} & (47) \\{{{\pm M_{4}} = {{\pm \begin{pmatrix}0 & {- 1} \\1 & 0\end{pmatrix}}\mspace{14mu} M_{5}}},{and}} & \; \\{{{\pm M_{4}} = {{\pm \begin{pmatrix}1 & 0 \\0 & {- 1}\end{pmatrix}}\mspace{14mu} M_{7}}},} & \;\end{matrix}$if one of the simplest solution representable by the followingexpression (48) is obtained, remaining solutions are readily obtained,in one or more embodiments:e _(kl) =M ₄.  (48)For example, when a solution is selected to satisfy the followingexpressions (49), the sum of the row sums of two encode matrices alwaysbecomes two:e ₁₁ =M ₄,e ₁₂ =M ₅,e ₂₁ =M ₆,e ₂₂ =M ₇,x ₁₁ =M ₄,y ₁₂ =M ₇,x ₂₁ =M ₅,−y ₂₂ =M ₆,−y ₁₁ =M ₄,x ₁₂ =M ₇,y ₂₁ =M ₅, andx ₂₂ =M ₆,  (49)Expressions (49) represents one of solutions which allows demodulatingthe input tensor a.

As a detailed representation of the solution represented by expression(49), the encode tensor E and the decode matrices X_(a) and X_(b) can berepresented by the following expressions (50) and (51), in one or moreembodiments:

$\begin{matrix}\begin{matrix}{E = {E_{1} + {iE}_{2}}} \\{{= {\begin{pmatrix}1 & 0 & 1 & 0 \\0 & 1 & 0 & 1 \\1 & 0 & {- 1} & 0 \\0 & {- 1} & 0 & 1\end{pmatrix} + {i\begin{pmatrix}0 & {- 1} & 0 & 1 \\1 & 0 & {- 1} & 0 \\0 & 1 & 0 & 1 \\1 & 0 & 1 & 0\end{pmatrix}}}},}\end{matrix} & (50) \\\begin{matrix}{X_{a} = {X_{1a} - {iX}_{2a}}} \\{{= {\begin{pmatrix}1 & 0 & 1 & 0 \\{- 1} & 0 & 1 & 0 \\1 & 0 & {- 1} & 0 \\1 & 0 & 1 & 0\end{pmatrix} - {i\begin{pmatrix}0 & 1 & 0 & 1 \\0 & {- 1} & 0 & 1 \\0 & {- 1} & 0 & 1 \\0 & {- 1} & 0 & {- 1}\end{pmatrix}}}},{and}}\end{matrix} & \; \\\begin{matrix}{X_{b} = {X_{1b} - {iX}_{2b}}} \\{= {\begin{pmatrix}0 & 1 & 0 & 1 \\0 & 1 & 0 & {- 1} \\0 & {- 1} & 0 & 1 \\0 & 1 & 0 & 1\end{pmatrix} - {{i\begin{pmatrix}{- 1} & 0 & {- 1} & 0 \\{- 1} & 0 & 1 & 0 \\{- 1} & 0 & 1 & 0 \\1 & 0 & 1 & 0\end{pmatrix}}.}}}\end{matrix} & \left( 51 \right.\end{matrix}$

In one or more embodiments, the products of the decode matrices X_(a)and X_(b) and the encode tensor E can be represented by the followingexpression (52):

$\begin{matrix}{{{X_{a}E} = {\begin{pmatrix}4 & 0 & 0 & 0 \\0 & 0 & 0 & 0 \\0 & 0 & 4 & 0 \\0 & 0 & 0 & 0\end{pmatrix} + {i\begin{pmatrix}0 & 0 & 0 & 0 \\0 & 4 & 0 & 0 \\0 & 0 & 0 & 0 \\0 & 0 & 0 & 4\end{pmatrix}}}},{and}} & (52) \\{{X_{b}E} = {\begin{pmatrix}0 & 0 & 0 & 0 \\0 & 4 & 0 & 0 \\0 & 0 & 0 & 0 \\0 & 0 & 0 & 4\end{pmatrix} + {{i\begin{pmatrix}4 & 0 & 0 & 0 \\0 & 0 & 0 & 0 \\0 & 0 & 4 & 0 \\0 & 0 & 0 & 0\end{pmatrix}}.}}} & \;\end{matrix}$

In one or more embodiments, as illustrated in FIG. 4, the encodercircuitry 14 is configured in accordance with expression (50), and thedecoder circuitry 16 is configured in accordance with expression (51),where four sensing electrodes 3 are prepared for one AD converter 15,that is, Q=4, and the encoder circuitry 14 comprises four mixers 24 ₁ to24 ₄ receiving carrier waves Mix1 to Mix4, respectively.

In one or more embodiments, the decoder circuitry 16 comprises a digitaldemodulator 25, coefficient supplying circuitry 26, decimeter/filters 27and 28, and a decoder 29. In one or more embodiments, the digitaldemodulator 25 is configured to demodulate the digital data stream qwith an in-phase local carrier which is in phase with the drive signalsand an out-of-phase local carrier having a phase shifted from that ofthe in-phase local carrier by π/2. In one or more embodiments, thedigital demodulator 25 comprises digital mixers 31 and 32. In one ormore embodiments, the digital mixer 31 is configured to multiply thedigital data stream q by coefficients Co corresponding to the in-phaselocal carrier, and the digital mixer 32 is configured to multiply thedigital data stream q by coefficients ϕ_(π/2) corresponding to theout-of-phase local carrier, which has a phase delayed from that of thein-phase local carrier by π/2. In one or more embodiments, thecoefficient supplying circuitry 26 is configured to supply thecoefficients ϕ₀ to the digital mixer 31 and the coefficients ϕ_(π/2) tothe digital mixer 32, in synchronization with a reference clock signalCLK_(REF).

In one or more embodiments, the decoder 29 comprises product-sumoperation circuitries 33 and 34. In one or more embodiments, theproduct-sum operation circuitry 33 is configured to perform aproduct-sum operation corresponding to the decode matrix X_(a), and theproduct-sum operation circuitry 34 is configured to perform aproduct-sum operation corresponding to the decode matrix X_(b).

In one or more embodiments, the decimeter/filter 27 is configured todistribute the output of the digital mixer 31 to the product-sumoperation circuitries 33 and 34, and the decimeter/filter 28 isconfigured to distribute the output of the digital mixer 32 to theproduct-sum operation circuitries 33 and 34.

In one or more embodiments, Q=4, that is, N=2 and the driver circuitry12 supplies drive signals to the sensing electrodes 3 ₁ to 3 ₄ so thatthe waveform of the drive signals remains unchanged over bursts #1 to#4.

In one or more embodiments, as illustrated in FIG. 5, the mixers 24 ₁ to24 ₄ use the signals ϕ₀, ϕ_(−π/2), ϕ₀, and ϕ_(π/2) as the carrier wavesMix1 to Mix4, respectively, and modulate the carrier waves Mix1 to Mix4with the sensing signals f₁ to f₄, respectively, during burst #1. In oneor more embodiments, this operation corresponds to the first row of theencode matrices E₁ and E₂ in equation (50). In one or more embodiments,the value q₁ of the digital data stream q outputted from the ADconverter 15 during burst #1 is given by the following expression (53):q ₁=(A ₁ +A ₃)ϕ₀−(A ₂ −A ₄)ϕ_(π/2).  (53)In one or more embodiments, the digital mixers 31 and 32 outputsdemodulated data B1.1 and B1.2 obtained by multiplying q₁ by thecoefficients ϕ₀ and ϕ_(π/2), respectively. In one or more embodiments,the demodulated data B1.1 and B1.2 can be represented by the followingexpressions (54a) and (54b):B1.1=(A ₁ +A ₃)ϕ₀−(A ₂ −A ₄)ϕ_(π/2), and  (54a)B1.2=(A ₁ ±A ₃)ϕ_(π/2)(A ₂ −A ₄)ϕ₀.  (54b)

In one or more embodiments, the decimeter/filter 27 outputs thedemodulated data B1.1 received from the digital mixer 31 to theproduct-sum operation circuitry 33, and the decimeter/filter 28 outputsthe demodulated data B1.2 received from the digital mixer 32 to theproduct-sum operation circuitry 34.

In one or more embodiments, as illustrated in FIG. 6, the mixers 24 ₁ to24 ₄ use the signals ϕ_(π/2), ϕ₀, ϕ_(−π/2), and ϕ₀ as the carrier wavesMix1 to Mix4, respectively, and modulate the carrier waves Mix1 to Mix4with the sensing signals f₁ to f₄, respectively, during burst #2. In oneor more embodiments, this operation corresponds to the second row of theencode matrices E₁ and E₂ in equation (50). In one or more embodiments,the value q₂ of the digital data stream q outputted from the ADconverter 15 during burst #2 is given by the following expression (55):q ₂=(A ₁ −A ₃)ϕ_(π/2)+(A ₂ +A ₄)ϕ₀.  (55)In one or more embodiments, the digital mixers 31 and 32 outputsdemodulated data B2.1 and B2.2 obtained by multiplying q₂ by thecoefficients ϕ₀ and ϕ_(π/2), respectively. In one or more embodiments,the demodulated data B2.1 and B2.2 can be represented by the followingexpressions (56a) and (56b):B2.1=(A ₁ −A ₃)ϕ_(π/2)+(A ₂ +A ₄)ϕ₀, and  (56a)B2.2=−(A ₁ −A ₃)ϕ₀+(A ₂ +A ₄)ϕ_(π/2).  (56b)In one or more embodiments, the decimeter/filter 27 outputs thedemodulated data B2.1 received from the digital mixer 31 to theproduct-sum operation circuitry 34, and the decimeter/filter 28 outputsthe demodulated data B2.2 received from the digital mixer 32 to theproduct-sum operation circuitry 33.

In one or more embodiments, as illustrated in FIG. 7, the mixers 24 ₁ to24 ₄ use the signals ϕ₀, ϕ_(π/2), ϕ₀, and ϕ_(−π/2) as the carrier wavesMix1 to Mix4, respectively, and modulate the carrier waves Mix1 to Mix4with the sensing signals f₁ to f₄, respectively, during burst #3. In oneor more embodiments, this operation corresponds to the third row of theencode matrices E₁ and E₂ in equation (50). In one or more embodiments,the value q₃ of the digital data stream q outputted from the ADconverter 15 during burst #3 is given by the following expression (57):q ₃=(A ₁ −A ₃)ϕ₀+(A ₂ +A ₄)ϕ_(π/2).  (57)In one or more embodiments, the digital mixers 31 and 32 outputdemodulated data B3.1 and B3.2 obtained by multiplying q₃ by thecoefficients ϕ₀ and ϕ_(π/2), respectively. In one or more embodiments,the demodulated data B3.1 and B3.2 can be represented by the followingexpressions (58a) and (58b):B3.1=(A ₁ −A ₃)ϕ₀+(A ₂ +A ₄)ϕ_(π/2), and  (58a)B3.2=(A ₁ −A ₃)ϕ_(π/2)−(A ₂ +A ₄)ϕ₀.  (58b)In one or more embodiments, the decimeter/filter 27 outputs thedemodulated data B3.1 received from the digital mixer 31 to theproduct-sum operation circuitry 33, and the decimeter/filter 28 outputsthe demodulated data B3.2 received from the digital mixer 32 to theproduct-sum operation circuitry 34.

In one or more embodiments, as illustrated in FIG. 8, the mixers 24 ₁ to24 ₄ use the signals ϕ_(π/2), ϕ₀, ϕ_(π/2), and ϕ₀ as the carrier wavesMix1 to Mix4, respectively, and modulate the carrier waves Mix1 to Mix4with the sensing signals f₁ to f₄, respectively, during burst #4. In oneor more embodiments, this operation corresponds to the fourth row of theencode matrices E₁ and E₂ in equation (50). In one or more embodiments,the value q₄ of the digital data stream q outputted from the ADconverter 15 during burst #4 is given by the following expression (59):q ₄=(A ₁ ±A ₃)ϕ_(π/2)−(A ₂ −A ₄)ϕ₀.  (59)In one or more embodiments, the digital mixers 31 and 32 outputsdemodulated data B4.1 and B4.2 obtained by multiplying q₄ by thecoefficients ϕ₀ and ϕ_(π/2), respectively. In one or more embodiments,the demodulated data B4.1 and B4.2 can be represented by the followingexpressions (60a) and (60b):B4.1=(A ₁ +A ₃)ϕ_(π/2)−(A ₂ −A ₄)ϕ₀, and  (60a)B4.2=−(A ₁ +A ₃)ϕ₀−(A ₂ −A ₄)ϕ_(π/2).  (60b)In one or more embodiments, the decimeter/filter 27 outputs thedemodulated data B4.1 received from the digital mixer 31 to theproduct-sum operation circuitry 34, and the decimeter/filter 28 outputsthe demodulated data B4.2 received from the digital mixer 32 to theproduct-sum operation circuitry 33.

In one or more embodiments, the product-sum operation circuitries 33 and34 of the decoder 29 performs operations corresponding to the decodematrices X_(a) and X_(b) on the data B1.1 to B4.1 and B1.2 to B4.2received from the decimeter/filters 27 and 28 during bursts #1 to #4 tocalculate digital outputs 4A₁ϕ₀, 4A₂ϕ₀, 4A₃ϕ₀, and 4A₄ϕ₀, whichcorrespond to effective signal components, and digital outputs4A₁ϕ_(π/2), 4A₂ϕ_(π/2), 4A₃ϕ_(π/2), and 4A₄ϕ_(π/2), which correspond tonoise components. In one or more embodiments, the decode matrices X_(a)and X_(b) recites the unit imaginary number i, and accordingly theproduct-sum operation circuitries 33 and 34 are configured to use valuesoutputted from the digital mixer 32 in performing multiplication by theunit imaginary number i; the product-sum operation circuitries 33 and 34themselves are configured to perform operations in the real numberdomain, in one or more embodiments.

In one or more embodiments, the product-sum operation circuitry 33calculates the digital outputs 4A₁ϕ₀, 4A₂ϕ_(π/2), 4A₃ϕ₀, and 4A₄ϕ_(π/2)by performing a matrix operation on the demodulated data B1.1, B2.2,B3.1, and B4.2 received during bursts #1 to #4, in accordance with thefollowing expression (61):

$\begin{matrix}{\begin{pmatrix}{4A_{1}\Phi_{0}} \\{4A_{2}\Phi_{\pi/2}} \\{4A_{3}\Phi_{0}} \\{4A_{4}\Phi_{\pi/2}}\end{pmatrix} = {\begin{pmatrix}1 & {- 1} & 1 & {- 1} \\{- 1} & 1 & 1 & {- 1} \\1 & 1 & {- 1} & {- 1} \\1 & 1 & 1 & 1\end{pmatrix}{\begin{pmatrix}{B\; 1.1} \\{B\; 2.2} \\{B\; 3.1} \\{B\; 4.2}\end{pmatrix}.}}} & (61)\end{matrix}$The 4×4 matrix of expression (61), which corresponds to the decodematrix X_(a), is represented in a form in which no unit imaginarynumbers i are recited.

In one or more embodiments, the product-sum operation circuitry 34calculates the digital outputs 4A₁ϕ_(π/2), 4A₂ϕ₀, 4A₃ϕ_(π/2), and 4A₄ϕ₀by performing a matrix operation on the demodulated data B1.2, B2.1,B3.2, and B4.1 received during bursts #1 to #4, in accordance with thefollowing expression (62):

$\begin{matrix}{\begin{pmatrix}{4A_{1}\Phi_{\pi/2}} \\{4A_{2}\Phi_{0}} \\{4A_{3}\Phi_{\pi/2}} \\{4A_{4}\Phi_{0}}\end{pmatrix} = {\begin{pmatrix}1 & 1 & 1 & 1 \\1 & 1 & {- 1} & {- 1} \\1 & {- 1} & {- 1} & 1 \\{- 1} & 1 & {- 1} & 1\end{pmatrix}{\begin{pmatrix}{B\; 1.2} \\{B\; 2.1} \\{B\; 3.2} \\{B\; 4.1}\end{pmatrix}.}}} & (62)\end{matrix}$

In one or more embodiments, the processing unit 5 is configured toperform arithmetic processing for proximity sensing of an object to thesensor array 1, based on the digital outputs 4A₁ϕ₀, 4A₂ϕ₀, 4A₃ϕ₀, and4A₄ϕ₀, which correspond to the effective signal components.

In one or more embodiments, the processing unit 5 is further configuredto perform noise detection based on the digital outputs 4A₁ϕ_(π/2),4A₂ϕ_(π/2), 4A₃ϕ_(π/2), and 4A₄ϕ_(π/2), which correspond to the noisecomponents. When the sensing signals f₁ to f₄ are free from an influenceof noise, the digital outputs 4A₁ϕ_(π/2), 4A₂ϕ_(π/2), 4A₃ϕ_(π/2), and4A₄ϕ_(π/2) are expected to be zero, in one or more embodiments. If notso, the sensing signals f₁ to f₄ are determined as experiencing aninfluence of noise.

Although various embodiments of this disclosure have been specificallydescribed in the above, a person skilled in the art would appreciatethat the technologies disclosed in this disclosure may be implementedwith various modifications. For example, although embodiments in whichself-capacitance sensing is performed have been described in the above,mutual capacitance sensing may be performed, in one or more embodiments.In this case, the sensor array 1 further comprises drive electrodesopposed to the sensing electrodes 3 ₁ to 3 _(Q), in one or moreembodiments. In one or more embodiments, the driver circuitry 12 isconfigured to supply drive signals to the drive electrodes opposed tothe sensing electrodes 3 ₁ to 3 _(Q).

Although FIG. 1 illustrates the arrangement in which sensing electrodes3 associated with one AD converter 15 are arrayed in the verticaldirection, the arrangement of sensing electrodes 3 associated with oneAD converter 15 may be variously modified. As illustrated in FIG. 9, forexample, when sensing electrodes 3 are grouped into Q groups 40 ₁ to 40_(Q) arrayed in a specific direction, in the horizontal direction inFIG. 9, Q sensing electrodes 3 belonging to different groups 40 may beselected as sensing electrodes 3 associated with one AD converters 15.For example, the sensing electrodes 3 indicated by the hatchings in FIG.9 may be selected as sensing electrodes 3 associated with one ADconverters 15.

What is claimed is:
 1. A semiconductor device comprising: sensingcircuitry configured to: obtain sensing signals from sensing electrodes;generate first mixer output signals by modulating first carrier waveswith the sensing signals; and combine the first mixer output signals;and processing circuitry configured to detect noise based on thecombined first mixer output signals.
 2. The semiconductor device ofclaim 1, wherein the sensing signals comprise: a first sensing signalassociated with a first sensing electrode of the sensing electrodes, andwherein modulating the first carrier waves comprises modulating a firstcarrier wave of the first carrier waves with the first sensing signalduring a first burst of a drive signal driven on the sensing electrodesto obtain the sensing signals, wherein the first carrier wave is out ofphase with the drive signal.
 3. The semiconductor device of claim 2,wherein the sensing signals further comprise a second sensing signalassociated with a second sensing electrode of the sensing electrodes,and wherein modulating the first carrier waves further comprisesmodulating a second carrier wave of the first carrier waves with thesecond sensing signal during the first burst.
 4. The semiconductordevice of claim 3, wherein the sensing circuitry is further configuredto: generate second mixer output signals by: modulating a third carrierwave of second carrier waves with the first sensing signal during asecond burst of the drive signal; and modulating a fourth carrier waveof the second carrier waves with the second sensing signal during thesecond burst.
 5. The semiconductor device of claim 4, wherein the fourthcarrier wave is one of in phase with the drive signal or out of phasewith the drive signal by a first amount.
 6. The semiconductor device ofclaim 5, wherein the second carrier wave is one of in phase with thedrive signal or out of phase with the drive signal by the first amount.7. The semiconductor device of claim 4, wherein the sensing circuitry isfurther configured to combine the second mixer output signals, andwherein the processing circuitry is further configured to detect anobject based on the combined second mixer output signals.
 8. Thesemiconductor device of claim 3, wherein a phase of the first carrierwave is shifted from a phase of the drive signal by a third amount or afourth amount.
 9. The semiconductor device of claim 1, wherein theprocessing circuitry comprises: a digital demodulator configured todemodulate the combined first mixer output signals; and a decoderconfigured to generate a first digital output based on an output of thedigital demodulator.
 10. A capacitive sensing system comprising: sensingelectrodes; sensing circuitry configured to: obtain sensing signals fromthe sensing electrodes; generate first mixer output signals bymodulating first carrier waves with the sensing signals; and combine thefirst mixer output signals; and processing circuitry configured todetect noise based on the combined first mixer output signals.
 11. Thecapacitive sensing system of claim 10, wherein the sensing signalscomprise: a first sensing signal associated with a first sensingelectrode of the sensing electrodes, and wherein modulating the firstcarrier waves comprises modulating a first carrier wave of the firstcarrier waves with the first sensing signal during a first burst of adrive signal driven on the sensing electrodes to obtain the sensingsignals, wherein the first carrier wave is out of phase with the drivesignal.
 12. The capacitive sensing system of claim 11, wherein thesensing signals further comprise a second sensing signal associated witha second sensing electrode of the sensing electrodes, and whereinmodulating the first carrier waves further comprises modulating a secondcarrier wave of the first carrier waves with the second sensing signalduring the first burst.
 13. The capacitive sensing system of claim 12,wherein the sensing circuitry is further configured to: generate secondmixer output signals by: modulating a third carrier wave of secondcarrier waves with the first sensing signal during a second burst of thedrive signal; and modulating a fourth carrier wave of the second carrierwaves with the second sensing signal during the second burst; andcombine the second mixer output signals, and wherein the processingcircuitry is further configured to detect an object based on thecombined second mixer output signals.
 14. The capacitive sensing systemof claim 13, wherein the second carrier wave is in phase with the drivesignal or out of phase with the drive signal by a first amount, and thefourth carrier wave is in phase with the drive signal or out of phasewith the drive signal by the first amount.
 15. The capacitive sensingsystem of claim 12, wherein a phase of the first carrier wave is shiftedfrom a phase of the drive signal by a third amount or a fourth amount,and a phase of the second carrier wave is shifted from the phase of thedrive signal by the third amount or the fourth amount.
 16. A method forcapacitive sensing comprising: obtaining sensing signals from sensingelectrodes; generating first mixer output signals by modulating firstcarrier waves with the sensing signals; combining the first mixer outputsignals; and detecting noise based on the combined first mixer outputsignals.
 17. The method of claim 16, wherein the sensing signalscomprise: a first sensing signal associated with a first sensingelectrode of the sensing electrodes; and a second sensing signalassociated with a second sensing electrode of the sensing electrodes;and wherein modulating the first carrier waves comprises: modulating afirst carrier wave of the first carrier waves with the first sensingsignal during a first burst of a drive signal driven on the sensingelectrodes, wherein the first carrier wave is out of phase with thedrive signal; and modulating a second carrier wave of the first carrierwaves with the second sensing signal during the first burst.
 18. Themethod of claim 17, further comprising: generating second mixer outputsignals by: modulating a third carrier wave of second carrier waves withthe first sensing signal during a second burst of the drive signal,wherein the third carrier wave is one of in phase with the drive signalor out of phase with the drive signal by a first amount; and modulatinga fourth carrier wave of the second carrier waves with the secondsensing signal during the second burst.
 19. The method of claim 18,wherein the second carrier wave is one of in phase with the drive signalor out of phase with the drive signal by the first amount, and thefourth carrier wave is one of in phase with the drive signal or out ofphase with the drive signal by the first amount.
 20. The method of claim18, further comprising: combining the second mixer output signals; anddetecting an object based on the combined second mixer output signals.